Memory devices are typically provided as internal, semiconductor, integrated circuits in computers or other electronic devices. There are many different types of memory utilized in memory devices, including random-access memory (RAM), read only memory (ROM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), phase change RAM (PCRAM) and flash memory, among others.
Memory devices are utilized as non-volatile memory for a wide range of electronic applications. Flash, and other, memory devices typically use a one-transistor memory cell that allows for high memory densities, high reliability, and low power consumption.
Uses for memory include memory for personal computers, personal digital assistants (PDAs), digital cameras, and cellular telephones, among others. Program code and system data, such as a basic input/output system (BIOS), are typically stored in flash memory devices. This information can be used in personal computer systems, and other electronic devices.
Two common types of memory array architectures, e.g., flash memory array architecture, are the “NAND” and “NOR” architectures, so called for the logical form in which the basic memory cell configuration of each is arranged.
A NAND array architecture arranges its array of floating gate memory cells in a matrix such that the gates of each floating gate memory cell in a row of the array are coupled to an access line (which is commonly referred to in the art as a “word line”). However each memory cell is not directly coupled to a column data line (which is commonly referred to in the art as a “bit line”) by its drain. Instead, the memory cells of the array are coupled together in series, source to drain, between a source line and a column data line. The terms “row” and “column,” as used herein, do not necessarily refer to a particular linear relation of the memory cells, but rather generally to an intersection in an arrangement of memory cells.
Memory cells in a NAND array architecture can be programmed to a desired state. That is, electric charge can be placed on or removed from the floating gate of a memory cell to put the cell into a number of stored states. For example, a single level cell (SLC) can represent two states, e.g., 1 or 0.
Memory cells, e.g., flash memory cells, can also be programmed to more than two states, such as to a number of states that allows a cell to represent more than two binary digits, e.g., 1111, 0111, 0011, 1011, 1001, 0001, 0101, 1101, 1100, 0100, 0000, 1000, 1010, 0010, 0110, and 1110. Such cells may be referred to as multi state memory cells, multidigit cells, or multilevel cells (MLCs). MLCs can allow the manufacture of higher density memories without increasing the number of memory cells since each cell can represent more than one binary digit, e.g., more than one bit. MLCs can have more than two programmed states, e.g., a cell capable of representing four digits can have sixteen programmed states. Some MLCs may have an erased state and a number of programmed states, each of which can represent a bit pattern. For these MLCs, the lowermost program state is not programmed above the erased state, that is, if the cell is programmed to the lowermost state, it remains in the erased state rather than having a charge applied to the cell during a programming operation. The other states can be referred to as “non-erased” states.
One or more voltage levels are utilized in operating memory cells, particularly in operating MLCs. Due to the variety of programmable states of each cell, voltages of several magnitudes may be used during operation of MLCs, e.g., programming and/or read. Increasing the quantity of different voltage levels used, can increase the circuit complexity and losses associated with producing many different voltage levels, e.g., energy usage, heat generated, etc.